Function QTMC_SetBarrierPattern

pub unsafe extern "C" fn QTMC_SetBarrierPattern(
    pattern: u32_,
) -> Result

Sets the parallax barrier’s mask pattern and polarity phase (12+1 bits).

Bit11 to 0 correspond to a repeating barrier mask pattern, 0 meaning the corresponding mask unit is transparent and 1 that it is opaque. The direction is: left->right corresponds to MSB->LSB.

Bit12 is the polarity bit.

QTM’s expander management thread repeatedly writes (on every loop iteration) the current mask pattern plus polarity bit, whether it is normally set or overridden by qtm:c, then on the following set, negates both (it writes pattern ^ 0x1FFF). This is done at all times, even it 2D mode.

The register being written to are regId 0x02 and 0x03 (output ports). TI TCA6416A I2C->Parallel expander is located on bus I2C1 (PA 0x10161000) device ID 0x40.

This function has no effect on N2DSXL.

Arguments

• pattern - Barrier mask pattern (bit12: polarity, bit11-0: 12-bit mask pattern)

Returns

0xD82183F8 if API not started, otherwise 0 (success). [Patent] US20030234980A1 for a description of parallax barriers. mask pattern used for super-stable 3D are as follows (position 0 to 11):

000011111100 000001111110 000000111111 100000011111 110000001111 111000000111 111100000011 111110000001 111111000000 011111100000 001111110000 000111111000

When SS3D is disabled (ie. it tries to match O3DS behavior), then pattern becomes: 111100000111 Notice that the slit width is reduced from 6 to 5 units there.

For 2D it is all-zero: 000000000000

2D pattern is automatically set on QTM process init and exit.